一种全差分1.5 V低功耗CMOS运算放大器,具有轨对轨电流调节常数g/sub /输入级

E. Peeters, M. Steyaert, W. Sansen
{"title":"一种全差分1.5 V低功耗CMOS运算放大器,具有轨对轨电流调节常数g/sub /输入级","authors":"E. Peeters, M. Steyaert, W. Sansen","doi":"10.1109/CICC.1997.606588","DOIUrl":null,"url":null,"abstract":"This paper presents a compact fully differential amplifier with a rail-to-rail input stage and a class AB output stage. A new biasing scheme for a complementary rail-to-rail input stage with constant g/sub m/ is introduced. The proposed biasing scheme uses a current regulating loop to keep the sum of the biasing currents of the complementary input pairs constant. This results in a g/sub m/-variation below 4% for input pairs operating in weak inversion. In a standard 0.7 /spl mu/m CMOS technology the circuit can handle power supply voltages ranging from 1.5 V up to 3.3 V. For a power consumption of 300 /spl mu/W and a load capacitance of 15 pF a gainbandwidth (GBW) of 4.3 MHz is achieved. This results in a GBWCL-to-supply-power ratio of 210 MHz/spl middot/pF/mW. The total die area of the amplifier is 0.25 mm/sup 2/.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"A fully differential 1.5 V low-power CMOS operational amplifier with a rail-to-rail current-regulated constant-g/sub m/ input stage\",\"authors\":\"E. Peeters, M. Steyaert, W. Sansen\",\"doi\":\"10.1109/CICC.1997.606588\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a compact fully differential amplifier with a rail-to-rail input stage and a class AB output stage. A new biasing scheme for a complementary rail-to-rail input stage with constant g/sub m/ is introduced. The proposed biasing scheme uses a current regulating loop to keep the sum of the biasing currents of the complementary input pairs constant. This results in a g/sub m/-variation below 4% for input pairs operating in weak inversion. In a standard 0.7 /spl mu/m CMOS technology the circuit can handle power supply voltages ranging from 1.5 V up to 3.3 V. For a power consumption of 300 /spl mu/W and a load capacitance of 15 pF a gainbandwidth (GBW) of 4.3 MHz is achieved. This results in a GBWCL-to-supply-power ratio of 210 MHz/spl middot/pF/mW. The total die area of the amplifier is 0.25 mm/sup 2/.\",\"PeriodicalId\":111737,\"journal\":{\"name\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1997.606588\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606588","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18

摘要

本文提出了一种紧凑的全差动放大器,具有轨对轨输入级和AB类输出级。介绍了一种新的恒g/sub / m/互补轨对轨输入级偏置方案。所提出的偏置方案采用电流调节回路来保持互补输入对偏置电流之和恒定。这导致在弱反转中工作的输入对的g/sub m/-变化低于4%。在标准的0.7 /spl mu/m CMOS技术中,电路可以处理从1.5 V到3.3 V的电源电压。功耗为300 /spl mu/W,负载电容为15 pF时,可实现4.3 MHz的增益带宽(GBW)。这导致gbwcl -电源功率比为210 MHz/spl中点/pF/mW。放大器的总模面积为0.25 mm/sup 2/。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A fully differential 1.5 V low-power CMOS operational amplifier with a rail-to-rail current-regulated constant-g/sub m/ input stage
This paper presents a compact fully differential amplifier with a rail-to-rail input stage and a class AB output stage. A new biasing scheme for a complementary rail-to-rail input stage with constant g/sub m/ is introduced. The proposed biasing scheme uses a current regulating loop to keep the sum of the biasing currents of the complementary input pairs constant. This results in a g/sub m/-variation below 4% for input pairs operating in weak inversion. In a standard 0.7 /spl mu/m CMOS technology the circuit can handle power supply voltages ranging from 1.5 V up to 3.3 V. For a power consumption of 300 /spl mu/W and a load capacitance of 15 pF a gainbandwidth (GBW) of 4.3 MHz is achieved. This results in a GBWCL-to-supply-power ratio of 210 MHz/spl middot/pF/mW. The total die area of the amplifier is 0.25 mm/sup 2/.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信