全差分d波段CMOS放大器在65nm大块CMOS

2018 11th UK-Europe-China Workshop on Millimeter Waves and Terahertz Technologies (UCMMT) Pub Date : 2018-09-01 DOI:10.1109/ucmmt45316.2018.9015666

Minyun Jiang, J. Wen, Yuqing Liu, Wentao Wu, D. Yang, Lingling Sun

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引用次数: 1

摘要

本文提出了一种采用65纳米CMOS工艺的140GHz d波段全差分三级放大器。电路采用共源(CS)，并采用交叉电容中和技术形成反馈，电路匹配基于变压器匹配。仿真结果表明，该放大器在127GHz时最大增益为17.2 dB, 3dB带宽从121GHz到159GHz分别为38GHz，饱和输出功率为7.2dBm, 140GHz时模拟的1db压缩功率为2.8dBm。放大器的核心面积为0.09mm2。1.2 V电源电压下的功耗为56mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Fully differential D-band CMOS Amplifier in 65nm bulk CMOS

This paper presents a 140GHz D-band fully differential three-stage amplifier in 65-nm CMOS. The circuit uses a common source (CS) and utilizes cross-capacitance neutralization technology to form feedback and circuit matching is base on transformer matching. The simulation result show that amplifier achieves a maximum gain of 17.2 dB at 127GHz and the 3dB bandwidth is 38GHz from 121GHz from 159GHz, the saturated output power is 7.2dBm and the simulated 1-dB compression power is 2.8dBm at 140GHz. The core of amplifier occupies an area of 0.09mm2. The power consumption is 56mW from a 1.2 V supply voltage.

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2018 11th UK-Europe-China Workshop on Millimeter Waves and Terahertz Technologies (UCMMT)

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