可重构神经网络加速器初步研究

Momoka Ohba, S. Shindo, Shinobu Miwa, Tomoaki Tsumura, Hayato Yamaki, H. Honda
{"title":"可重构神经网络加速器初步研究","authors":"Momoka Ohba, S. Shindo, Shinobu Miwa, Tomoaki Tsumura, Hayato Yamaki, H. Honda","doi":"10.1109/CANDAR.2016.0128","DOIUrl":null,"url":null,"abstract":"Neural networks or NNs are widely used for many machine learning applications such as image processing and speech recognition. Since general-purpose processors such as CPUs and GPUs are energy inefficient for computing NNs, application-specific hardware accelerators for NNs (a.k.a. neural network accelerators or NNAs) have been proposed to improve the energy efficiency. However, existing NNAs are too customized for computing specific NNs, and do not allow to change NN models or learning algorithms. This limitation prevents machine-learning researchers from exploiting NNAs, so we are developing a general-purpose NNA that has the capability to compute any NN. Our NNA equips with reconfigurable logic in addition to various custom logics, which is called reconfigurable NNA or RNNA. RNNA is highly tuned for the NN computation but allows end users to customize the hardware to compute their desired NN. This paper introduces the RNNA architecture, and reports the performance analysis of RNNA with a cycle-level simulator.","PeriodicalId":322499,"journal":{"name":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Initial Study of Reconfigurable Neural Network Accelerators\",\"authors\":\"Momoka Ohba, S. Shindo, Shinobu Miwa, Tomoaki Tsumura, Hayato Yamaki, H. Honda\",\"doi\":\"10.1109/CANDAR.2016.0128\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Neural networks or NNs are widely used for many machine learning applications such as image processing and speech recognition. Since general-purpose processors such as CPUs and GPUs are energy inefficient for computing NNs, application-specific hardware accelerators for NNs (a.k.a. neural network accelerators or NNAs) have been proposed to improve the energy efficiency. However, existing NNAs are too customized for computing specific NNs, and do not allow to change NN models or learning algorithms. This limitation prevents machine-learning researchers from exploiting NNAs, so we are developing a general-purpose NNA that has the capability to compute any NN. Our NNA equips with reconfigurable logic in addition to various custom logics, which is called reconfigurable NNA or RNNA. RNNA is highly tuned for the NN computation but allows end users to customize the hardware to compute their desired NN. This paper introduces the RNNA architecture, and reports the performance analysis of RNNA with a cycle-level simulator.\",\"PeriodicalId\":322499,\"journal\":{\"name\":\"2016 Fourth International Symposium on Computing and Networking (CANDAR)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 Fourth International Symposium on Computing and Networking (CANDAR)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CANDAR.2016.0128\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 Fourth International Symposium on Computing and Networking (CANDAR)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CANDAR.2016.0128","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

神经网络或NNs广泛用于许多机器学习应用,如图像处理和语音识别。由于通用处理器(如cpu和gpu)对于计算神经网络是能源效率低下的,因此提出了用于神经网络的特定应用硬件加速器(又称神经网络加速器或NNAs)来提高能源效率。然而,现有的神经网络对于计算特定的神经网络来说过于定制化,不允许改变神经网络模型或学习算法。这个限制阻止了机器学习研究人员利用NNA,所以我们正在开发一种通用的NNA,它具有计算任何神经网络的能力。我们的NNA除了各种自定义逻辑外,还配备了可重构逻辑,称为可重构NNA或RNNA。RNNA对神经网络计算进行了高度调整,但允许最终用户自定义硬件来计算他们想要的神经网络。本文介绍了RNNA的结构,并利用循环级模拟器对RNNA进行了性能分析。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Initial Study of Reconfigurable Neural Network Accelerators
Neural networks or NNs are widely used for many machine learning applications such as image processing and speech recognition. Since general-purpose processors such as CPUs and GPUs are energy inefficient for computing NNs, application-specific hardware accelerators for NNs (a.k.a. neural network accelerators or NNAs) have been proposed to improve the energy efficiency. However, existing NNAs are too customized for computing specific NNs, and do not allow to change NN models or learning algorithms. This limitation prevents machine-learning researchers from exploiting NNAs, so we are developing a general-purpose NNA that has the capability to compute any NN. Our NNA equips with reconfigurable logic in addition to various custom logics, which is called reconfigurable NNA or RNNA. RNNA is highly tuned for the NN computation but allows end users to customize the hardware to compute their desired NN. This paper introduces the RNNA architecture, and reports the performance analysis of RNNA with a cycle-level simulator.
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