积极的电源电压缩放和有效调节技术[CMOS数字电路]

A. Dancy, Anantha Chandrakasan
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引用次数: 31

摘要

通过技术、电路和架构优化,积极地将电压缩放到1 V及以下是低功耗设计的关键。阈值电压缩放使积极的电源缩放,但增加泄漏功率。介绍了MTCMOS、可变V/sub - T/大块cmos和可变V/sub - T/ SOI等控制空闲漏功率的技术和电路发展趋势。在计算工作负载随时间变化的应用中,还可以通过自适应地改变电源电压来降低功耗。积极的电压和功率级缩放需要高效的DC-DC转换电路,在某些情况下,有必要将此功能嵌入处理器中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Techniques for aggressive supply voltage scaling and efficient regulation [CMOS digital circuits]
Aggressive voltage scaling to 1 V and below through technology, circuit, and architecture optimization is the key to low-power design. Threshold voltage scaling enables aggressive supply scaling but increases leakage power. Technology and circuit trends to control idle leakage power are presented including MTCMOS, variable V/sub T/ bulk-CMOS, and variable V/sub T/ SOI. Power can also be reduced by adaptively varying the supply voltage in applications where the computational workload varies with time. Aggressive voltage and power level scaling requires efficient DC-DC conversion circuitry and in some cases, it is necessary to embed this function in the processor.
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