{"title":"基于astic仿真数据的RFIC集成电感元建模","authors":"I. Kateeb, M. Bikdash, N. Dogan","doi":"10.1109/SECON.2010.5453816","DOIUrl":null,"url":null,"abstract":"In this paper, we describe a new method to generate lumped-parameter equivalent-circuit (EC) approximations for on-chip inductors. Nonlinear least-squares fitting is then applied to numerical data obtained from a very large number of single-time ASITIC runs for a given process. Results show significant improvement as compared to the published models. The proposed method should enable the optimization of inductor geometry.","PeriodicalId":286940,"journal":{"name":"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Metamodeling of RFIC integrated inductors using ASITIC simulation data\",\"authors\":\"I. Kateeb, M. Bikdash, N. Dogan\",\"doi\":\"10.1109/SECON.2010.5453816\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we describe a new method to generate lumped-parameter equivalent-circuit (EC) approximations for on-chip inductors. Nonlinear least-squares fitting is then applied to numerical data obtained from a very large number of single-time ASITIC runs for a given process. Results show significant improvement as compared to the published models. The proposed method should enable the optimization of inductor geometry.\",\"PeriodicalId\":286940,\"journal\":{\"name\":\"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-03-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SECON.2010.5453816\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SECON.2010.5453816","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Metamodeling of RFIC integrated inductors using ASITIC simulation data
In this paper, we describe a new method to generate lumped-parameter equivalent-circuit (EC) approximations for on-chip inductors. Nonlinear least-squares fitting is then applied to numerical data obtained from a very large number of single-time ASITIC runs for a given process. Results show significant improvement as compared to the published models. The proposed method should enable the optimization of inductor geometry.