High-speed systolic implementation of fast QR adaptive filters

A rectangular systolic array of processing units is presented for implementation of the QR adaptive filter. This array requires approximately 8N processing units to exactly solve the least-squares adaptive filtering problem using QR factorization. If a processing unit takes 50 ns to perform a task, the array can be implemented at an adaptive-filter input sampling rate of 20 MHz, with no loss in characteristic high performance (of least squares), numerical stability, or accuracy. This improves on widely used gradient methods for adaptive filtering, which must insert increasing amounts of performance-degrading delay into the adaptive updating when either the speed of implementation or number of taps increase. A discussion of the structure and interconnection of the processing units is included, as well as computer simulations that verify the stability and performance of the adaptive processing array.<>