Shien-Yang Wu, Lin Chih-Yung, M. Chiang, J. Liaw, J. Cheng, S. Yang, C. Tsai, P. Chen, T. Miyashita, Chang-Yun Chang, V. Chang, K. Pan, J. Chen, Y. Mor, K. Lai, C. Liang, Chen Hsin-Chi, S. Chang, Chia-Pin Lin, C. Hsieh, R. F. Tsui, C. Yao, C. C. Chen, R. Chen, C. Lee, Hau-Yu Lin, Chih-Sheng Chang, K. W. Chen, M. Tsai, Kuei-Shun Chen, Y. Ku, S. Jang
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A 7nm CMOS platform technology featuring 4th generation FinFET transistors with a 0.027um2 high density 6-T SRAM cell for mobile SoC applications
For the first time, a leading edge 7nm CMOS platform technology for mobile SoC applications is presented. This technology provides >3.3X routed gate density and 35%∼40% speed gain or >65% power reduction over our 16nm FinFET technology. A fully functional 256Mb SRAM test-chip with the smallest high density SRAM cell of 0.027um2 is demonstrated down to 0.5V. The 4th generation FinFET transistors are optimized with device mismatch reduction by 25%∼35% and multi-Vt device options to enable low power and high performance design requirements.
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