A 10MHz-1GHz Mitigated Shunt Capacitance Hybrid LNA for Use in a Ka-Band Envelope Detector Baseband Output

A simulated hybrid LNA exhibiting over 45 dB of power gain and <2 dB noise figure from 10 MHz to 1 GHz is designed as a baseband amplification stage for a zero-bias diode envelope detector in on-off-keying systems. The high source impedance of the diode requires mitigation and compensation of parasitic shunt capacitance between the detector and first gain stage. Here, we remove the ground plane between the first transistor stage and the diode output, as well as increasing pad-to-pad and pad-to-via spacing to reduce on-PCB parasitic shunt capacitance. The transistors are low-Cgs HEMTs to further ensure low shunt-capacitance to ground. We also employ inductive peaking to compensate for the dominant pole caused by the source shunt capacitance. The amplifier is expected to dissipate 8 mW from a 0.5 V source.