{"title":"嵌入式低复杂度JPEG2000视频编码系统","authors":"A. Schuchter","doi":"10.1109/ESTMED.2007.4375807","DOIUrl":null,"url":null,"abstract":"In this paper, we discuss an embedded hardware low complexity JPEG2000 video coding system. The hardware implementation is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure. The hardware used mainly consists of a microprocessor (Analog Devices ADSP- BF533 Blackfin Processor) and a JPEG2000 chip (ADV202). DMAs (direct memory access) are introduced to optimize memory transfers in the system. It is shown that memory to memory DMAs lead to significant improvement in our proposed memory structure resulting in better performance.","PeriodicalId":428196,"journal":{"name":"2007 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Embedded Low Complexity JPEG2000 Videocoding System\",\"authors\":\"A. Schuchter\",\"doi\":\"10.1109/ESTMED.2007.4375807\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we discuss an embedded hardware low complexity JPEG2000 video coding system. The hardware implementation is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure. The hardware used mainly consists of a microprocessor (Analog Devices ADSP- BF533 Blackfin Processor) and a JPEG2000 chip (ADV202). DMAs (direct memory access) are introduced to optimize memory transfers in the system. It is shown that memory to memory DMAs lead to significant improvement in our proposed memory structure resulting in better performance.\",\"PeriodicalId\":428196,\"journal\":{\"name\":\"2007 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESTMED.2007.4375807\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTMED.2007.4375807","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Embedded Low Complexity JPEG2000 Videocoding System
In this paper, we discuss an embedded hardware low complexity JPEG2000 video coding system. The hardware implementation is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure. The hardware used mainly consists of a microprocessor (Analog Devices ADSP- BF533 Blackfin Processor) and a JPEG2000 chip (ADV202). DMAs (direct memory access) are introduced to optimize memory transfers in the system. It is shown that memory to memory DMAs lead to significant improvement in our proposed memory structure resulting in better performance.
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