基于PHITS的SRAM中子诱导软错误率估计

2012 IEEE 18th International On-Line Testing Symposium (IOLTS) Pub Date : 2012-06-27 DOI:10.1109/IOLTS.2012.6313859

S. Yoshimoto, T. Amashita, Masayoshi Yoshimura, Y. Matsunaga, H. Yasuura, S. Izumi, H. Kawaguchi, M. Yoshimoto

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引用次数: 8

摘要

提出了一种基于粒子输运码的中子诱导软误码率估计工具:PHITS。所提出的工具可以根据SRAM中的各种数据模式和存储单元的布局计算SER。作为布局，考虑了两种NMOS-PMOS-NMOS 6T和由内向外的PMOS-NMOS-PMOS版本。该工具使用提取功能区分单事件打乱(SEU) SER、水平多单元打乱(MCU) SER和垂直MCU SER。在由内到外的PMOS-NMOS-PMOS 6T SRAM单元布局中，水平MCU SER预计比一般NMOS-PMOS-NMOS 6T单元布局低26-41%。

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Neutron-induced soft error rate estimation for SRAM using PHITS

This paper presents a novel neutron-induced soft-error-rate (SER) estimation tool with a particle transport code: PHITS. The proposed tool can calculate the SER according to various data patterns and the layout of the memory cells in an SRAM. As layouts, two kinds of an NMOS-PMOS-NMOS 6T and an inside-out PMOS-NMOS-PMOS versions are considered. The proposed tool distinguishes a single-event-upset (SEU) SER, a horizontal multiple-cell-upset (MCU) SER, and a vertical MCU SER using an extracting function. The horizontal MCU SER in the inside-out version of the PMOS-NMOS-PMOS 6T SRAM cell layout was expected to be 26-41% less than that of the general NMOS-PMOS-NMOS 6T cell layout.

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2012 IEEE 18th International On-Line Testing Symposium (IOLTS)

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