基于EFSM遍历的伪确定性泛函ATPG

2005 Sixth International Workshop on Microprocessor Test and Verification Pub Date : 2005-11-03 DOI:10.1109/MTV.2005.1

G. D. Guglielmo, F. Fummi, C. Marconcini, G. Pravadelli

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引用次数: 5

摘要

本文提出了一种利用扩展有限状态机(EFSM)模型伪确定性生成测试序列的功能ATPG框架。约束求解器或sat求解器用于生成测试向量，使我们能够均匀地遍历被测设计(DUT)的状态空间。这无疑增加了ATPG观察和控制难以检测的故障的能力

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Pseudo-Deterministic Functional ATPG based on EFSM Traversing

This paper presents a functional ATPG framework which exploits the extended finite state machine (EFSM) model to pseudo-deterministically generate test sequences. A constraint solver or a SAT-solver is used to generate test vectors that allow us to uniformly traverse the state space of the design under test (DUT). This definitely increases the ability of the ATPG to observe and control hard-to-detect faults

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2005 Sixth International Workshop on Microprocessor Test and Verification

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