{"title":"一个分布式处理系统的设计验证过程","authors":"K.L. Huffstutter","doi":"10.1109/DASC.1990.111332","DOIUrl":null,"url":null,"abstract":"A novel distributed multiprocessor system is being developed for a specific government application which requires product development in under 14 months. The system development incorporates a 32-bit advanced modular processor (AMP) with extended local bus (ELB) capabilities and a dual redundant 21-bit VME backplane interface. The AMP is a 6*9 inch double-sided module which integrates the MIPS R3000/R3010 RISC (reduced-instruction-set computer) microprocessor chip set with three 55K gate VHSIC chip designs to achieve a performance capability of over 20 VAX MIPS. Multiple AMPs will be used in the system with additional growth capability of up to 10 AMP modules. An I/O processor and four I/O modules will be developed to provide VME bus extension capabilities and other interface functions. In parallel with the hardware development is an extensive Ada software development which includes a loosely coupled multiprocessor real-time operating system and associated diagnostics and support software. The design methodology for the AMP is presented, including system architecture, software development, and a comprehensive verification process which emphasizes the importance of integrating software and hardware prior to ASIC (application-specific integrated circuit) fabrication.<<ETX>>","PeriodicalId":141205,"journal":{"name":"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A distributed processing system design verification process\",\"authors\":\"K.L. Huffstutter\",\"doi\":\"10.1109/DASC.1990.111332\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel distributed multiprocessor system is being developed for a specific government application which requires product development in under 14 months. The system development incorporates a 32-bit advanced modular processor (AMP) with extended local bus (ELB) capabilities and a dual redundant 21-bit VME backplane interface. The AMP is a 6*9 inch double-sided module which integrates the MIPS R3000/R3010 RISC (reduced-instruction-set computer) microprocessor chip set with three 55K gate VHSIC chip designs to achieve a performance capability of over 20 VAX MIPS. Multiple AMPs will be used in the system with additional growth capability of up to 10 AMP modules. An I/O processor and four I/O modules will be developed to provide VME bus extension capabilities and other interface functions. In parallel with the hardware development is an extensive Ada software development which includes a loosely coupled multiprocessor real-time operating system and associated diagnostics and support software. The design methodology for the AMP is presented, including system architecture, software development, and a comprehensive verification process which emphasizes the importance of integrating software and hardware prior to ASIC (application-specific integrated circuit) fabrication.<<ETX>>\",\"PeriodicalId\":141205,\"journal\":{\"name\":\"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-10-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DASC.1990.111332\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"9th IEEE/AIAA/NASA Conference on Digital Avionics Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DASC.1990.111332","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A distributed processing system design verification process
A novel distributed multiprocessor system is being developed for a specific government application which requires product development in under 14 months. The system development incorporates a 32-bit advanced modular processor (AMP) with extended local bus (ELB) capabilities and a dual redundant 21-bit VME backplane interface. The AMP is a 6*9 inch double-sided module which integrates the MIPS R3000/R3010 RISC (reduced-instruction-set computer) microprocessor chip set with three 55K gate VHSIC chip designs to achieve a performance capability of over 20 VAX MIPS. Multiple AMPs will be used in the system with additional growth capability of up to 10 AMP modules. An I/O processor and four I/O modules will be developed to provide VME bus extension capabilities and other interface functions. In parallel with the hardware development is an extensive Ada software development which includes a loosely coupled multiprocessor real-time operating system and associated diagnostics and support software. The design methodology for the AMP is presented, including system architecture, software development, and a comprehensive verification process which emphasizes the importance of integrating software and hardware prior to ASIC (application-specific integrated circuit) fabrication.<>