Software Solution of Secure Debug Based on RISC-V CPU

When using the CPU chip containing the debug module, the mechanism of secure debug is required to ensure the security of the internal data in the CPU chip. But, the specification of RISC-V instruction architecture set only describes the guideline of secure debug mechanism for hardware aspect. This paper presents a software solution for the RISC-V CPU secure debug mechanism, and the configuration program on the host computer first creates the black box area configuration data and secure authentication data, then passes the data through the debug channel to the firmware on the chip, then the firmware authenticates the security data and writes the configuration data of the black box area. The solution is combined with RISC-V CPU secure debug of hardware characteristics, and provides a comprehensive implementation reference for RISC-V CPU secure debug.