{"title":"关于乘数的内置自检","authors":"Mary D. Pulukuri, George J. Starr, C. Stroud","doi":"10.1109/SECON.2010.5453929","DOIUrl":null,"url":null,"abstract":"We evaluate some of the previously proposed test algorithms and approaches for various types of multipliers. We present methods to effectively test multipliers independent of their architecture and to achieve greater than 99% single stuck-at gate-level fault coverage with a simple 8-bit or 9-bit binary up-counter and some multiplexers. Finally, we discuss testing the multipliers present in most current Field Programmable Gate Arrays (FGPAs).1","PeriodicalId":286940,"journal":{"name":"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"On Built-In Self-Test for multipliers\",\"authors\":\"Mary D. Pulukuri, George J. Starr, C. Stroud\",\"doi\":\"10.1109/SECON.2010.5453929\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We evaluate some of the previously proposed test algorithms and approaches for various types of multipliers. We present methods to effectively test multipliers independent of their architecture and to achieve greater than 99% single stuck-at gate-level fault coverage with a simple 8-bit or 9-bit binary up-counter and some multiplexers. Finally, we discuss testing the multipliers present in most current Field Programmable Gate Arrays (FGPAs).1\",\"PeriodicalId\":286940,\"journal\":{\"name\":\"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-03-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SECON.2010.5453929\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SECON.2010.5453929","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We evaluate some of the previously proposed test algorithms and approaches for various types of multipliers. We present methods to effectively test multipliers independent of their architecture and to achieve greater than 99% single stuck-at gate-level fault coverage with a simple 8-bit or 9-bit binary up-counter and some multiplexers. Finally, we discuss testing the multipliers present in most current Field Programmable Gate Arrays (FGPAs).1