低功耗专用于LTE应用的FFT处理器

2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) Pub Date : 2013-07-15 DOI:10.1109/SAMOS.2013.6621102

Tomasz Patyk, D. Guevorkian, Teemu Pitkänen, P. Jääskeläinen, J. Takala

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引用次数: 18

摘要

在本文中，我们描述了一种适合混合radix4/2/3 FFT算法的处理器架构。提议的设计支持LTE应用所需的所有FFT尺寸，即128-2048/1536。处理器基于传输触发体系结构处理器体系结构，该体系结构由一组功能单元定制，专门为手头的应用程序设计。该处理器采用ASIC技术合成，并对其能效和性能进行了评价。所开发的处理器是可编程的，但显示出与固定功能ASIC实现相当的能源效率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low-power application-specific FFT processor for LTE applications

In this paper, we describe a processor architecture tailored to mixed-radix4/2/3 FFT algorithm. The proposed design supports all FFT sizes, namely 128-2048/1536, required by the LTE applications. The processor is based on the Transport Triggered Architecture processor architecture, which was customized with a set of function units, designed especially for the application at hand. The processor has been synthesized on an ASIC technology and both energy-efficiency and performance have been evaluated. The developed processor is programmable but shows energy-efficiency comparable to fixed-function ASIC implementations.

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2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

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