A VLSI architecture for the order recursive estimation of higher order statistics

To achieve real-time performance in estimating the higher order statistics directly from the incoming time-series data, it is necessary to (a) design faster algorithms by reducing any inherent computational redundancy, and (b) apply parallel processing and pipelining. The authors present a VLSI implementable parallel architecture that computes in order recursive fashion estimates of all the higher order moments and cumulants up to the fourth order, at one of their non-redundant domains of support. The system consists of a tri-array and a farm of processors producing the moment terms and fourth order cumulants respectively. They have applied a systematic array synthesis methodology that guarantees the optimality of both arrays, as well as the appropriate interface between them, so that intermediate data movement and delays are minimized while achieving maximum output throughput.<>