{"title":"搭接栅极长度对掺杂肖特基势垒MOSFET模拟/射频性能的影响","authors":"Shashank Banchhor, Sumit KaleP, N. Kondekar","doi":"10.1109/ECS.2015.7124764","DOIUrl":null,"url":null,"abstract":"In this paper, we studied and investigated the impact of under lap gate length on the analog and RF performance of pocket doped Schottky Barrier MOSFET. In the presence of a highly doped pocket, major device performance metrics such as drain current, transconductance, cut-off frequency, maximum oscillation frequency and gain bandwidth product have been observed and verified using 2D Silvaco ATLAS simulator. Our results show that for increasing underlap gate length the off state current, parasitic capacitances and ambipolarcurrent is reduced. Moreover, we furthered scribed the influence of underlap architecture for the optimization of the device.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Influence of underlap gate length on analog/RF performance of pocket doped Schottky Barrier MOSFET\",\"authors\":\"Shashank Banchhor, Sumit KaleP, N. Kondekar\",\"doi\":\"10.1109/ECS.2015.7124764\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we studied and investigated the impact of under lap gate length on the analog and RF performance of pocket doped Schottky Barrier MOSFET. In the presence of a highly doped pocket, major device performance metrics such as drain current, transconductance, cut-off frequency, maximum oscillation frequency and gain bandwidth product have been observed and verified using 2D Silvaco ATLAS simulator. Our results show that for increasing underlap gate length the off state current, parasitic capacitances and ambipolarcurrent is reduced. Moreover, we furthered scribed the influence of underlap architecture for the optimization of the device.\",\"PeriodicalId\":202856,\"journal\":{\"name\":\"2015 2nd International Conference on Electronics and Communication Systems (ICECS)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 2nd International Conference on Electronics and Communication Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECS.2015.7124764\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECS.2015.7124764","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Influence of underlap gate length on analog/RF performance of pocket doped Schottky Barrier MOSFET
In this paper, we studied and investigated the impact of under lap gate length on the analog and RF performance of pocket doped Schottky Barrier MOSFET. In the presence of a highly doped pocket, major device performance metrics such as drain current, transconductance, cut-off frequency, maximum oscillation frequency and gain bandwidth product have been observed and verified using 2D Silvaco ATLAS simulator. Our results show that for increasing underlap gate length the off state current, parasitic capacitances and ambipolarcurrent is reduced. Moreover, we furthered scribed the influence of underlap architecture for the optimization of the device.