{"title":"安全物联网生态系统的双向触发三态触发器物理不可克隆功能","authors":"Hemavathy Sriramulu, V. S. K. Bhaaskaran","doi":"10.1109/iSES52644.2021.00022","DOIUrl":null,"url":null,"abstract":"The sequential circuit in the clock distribution consumes a substantial amount of power in a digital system. The digital circuitry in the security devices requires low power and energy with increased throughput. In this paper, the security of the IoT devices have been realized using Physical Unclonable Functions (PUF). The proposed Double Edge-Triggered Tristate Flip-Flop PUF (DETTFF PUF) demonstrates significantly enhanced PUF metrics and robustness. The reduced power and energy of the proposed architecture can make DETTFF PUF a preferable choice in the IoT ecosystem. Comparison against the conventional double edge-triggered flip-flops to validate the structure. The design is also compared with conventional double edge-triggered flip-flops to elucidate the significance of the proposed architecture.","PeriodicalId":293167,"journal":{"name":"2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Double Edge-Triggered Tristate Flip-Flop Physical Unclonable Function for Secure IoT Ecosystem\",\"authors\":\"Hemavathy Sriramulu, V. S. K. Bhaaskaran\",\"doi\":\"10.1109/iSES52644.2021.00022\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The sequential circuit in the clock distribution consumes a substantial amount of power in a digital system. The digital circuitry in the security devices requires low power and energy with increased throughput. In this paper, the security of the IoT devices have been realized using Physical Unclonable Functions (PUF). The proposed Double Edge-Triggered Tristate Flip-Flop PUF (DETTFF PUF) demonstrates significantly enhanced PUF metrics and robustness. The reduced power and energy of the proposed architecture can make DETTFF PUF a preferable choice in the IoT ecosystem. Comparison against the conventional double edge-triggered flip-flops to validate the structure. The design is also compared with conventional double edge-triggered flip-flops to elucidate the significance of the proposed architecture.\",\"PeriodicalId\":293167,\"journal\":{\"name\":\"2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/iSES52644.2021.00022\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/iSES52644.2021.00022","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Double Edge-Triggered Tristate Flip-Flop Physical Unclonable Function for Secure IoT Ecosystem
The sequential circuit in the clock distribution consumes a substantial amount of power in a digital system. The digital circuitry in the security devices requires low power and energy with increased throughput. In this paper, the security of the IoT devices have been realized using Physical Unclonable Functions (PUF). The proposed Double Edge-Triggered Tristate Flip-Flop PUF (DETTFF PUF) demonstrates significantly enhanced PUF metrics and robustness. The reduced power and energy of the proposed architecture can make DETTFF PUF a preferable choice in the IoT ecosystem. Comparison against the conventional double edge-triggered flip-flops to validate the structure. The design is also compared with conventional double edge-triggered flip-flops to elucidate the significance of the proposed architecture.