{"title":"FPGA应答器单时钟SRC纠错单元","authors":"V. Meltsov, N. Zhukova, A. Lapitsky, A. Vodyaho","doi":"10.1109/ElConRus51938.2021.9396681","DOIUrl":null,"url":null,"abstract":"One of the problems with the use of transponders in the navigation and identification of small aircraft is the susceptibility of radio signals to distortions. The methods proposed by the authors for receiving and processing damaged signals use various mechanisms for detecting and decoding transmitted information. One of these mechanisms is the control of SRC value of received message. Also presented is a method for correcting one-bit errors in a received message. To confirm the correct operation of the described algorithms, a device based on the FPGA Spartan 6 XC6ASLX150 from Xilinx was implemented. Thanks to the use of FPGAs, it was possible to synthesize a specialized architecture that maximally supports the potential parallelism of processing. Without this, it is impossible to ensure flight safety, especially in areas of airports and areas with heavy air traffic.","PeriodicalId":447345,"journal":{"name":"2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-01-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Unit of One-Clock SRC Error Correction for transponder on FPGA\",\"authors\":\"V. Meltsov, N. Zhukova, A. Lapitsky, A. Vodyaho\",\"doi\":\"10.1109/ElConRus51938.2021.9396681\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"One of the problems with the use of transponders in the navigation and identification of small aircraft is the susceptibility of radio signals to distortions. The methods proposed by the authors for receiving and processing damaged signals use various mechanisms for detecting and decoding transmitted information. One of these mechanisms is the control of SRC value of received message. Also presented is a method for correcting one-bit errors in a received message. To confirm the correct operation of the described algorithms, a device based on the FPGA Spartan 6 XC6ASLX150 from Xilinx was implemented. Thanks to the use of FPGAs, it was possible to synthesize a specialized architecture that maximally supports the potential parallelism of processing. Without this, it is impossible to ensure flight safety, especially in areas of airports and areas with heavy air traffic.\",\"PeriodicalId\":447345,\"journal\":{\"name\":\"2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-01-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ElConRus51938.2021.9396681\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ElConRus51938.2021.9396681","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Unit of One-Clock SRC Error Correction for transponder on FPGA
One of the problems with the use of transponders in the navigation and identification of small aircraft is the susceptibility of radio signals to distortions. The methods proposed by the authors for receiving and processing damaged signals use various mechanisms for detecting and decoding transmitted information. One of these mechanisms is the control of SRC value of received message. Also presented is a method for correcting one-bit errors in a received message. To confirm the correct operation of the described algorithms, a device based on the FPGA Spartan 6 XC6ASLX150 from Xilinx was implemented. Thanks to the use of FPGAs, it was possible to synthesize a specialized architecture that maximally supports the potential parallelism of processing. Without this, it is impossible to ensure flight safety, especially in areas of airports and areas with heavy air traffic.