{"title":"用于神经信号记录的266nW多斩波放大器,噪声效率系数为1.38","authors":"Yen-Po Chen, D. Blaauw, D. Sylvester","doi":"10.1109/VLSIC.2014.6858431","DOIUrl":null,"url":null,"abstract":"A low power high efficiency neural signal recording amplifier with a novel multi-chopper technique is proposed and implemented in 180nm CMOS. The input referred rms noise is 1.54μV (1-500Hz) with 266nA tail current. The result corresponds to a 1.38 noise efficiency factor, which is the best reported among current state-of-the-art amplifiers.","PeriodicalId":381216,"journal":{"name":"2014 Symposium on VLSI Circuits Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"41","resultStr":"{\"title\":\"A 266nW multi-chopper amplifier with 1.38 noise efficiency factor for neural signal recording\",\"authors\":\"Yen-Po Chen, D. Blaauw, D. Sylvester\",\"doi\":\"10.1109/VLSIC.2014.6858431\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low power high efficiency neural signal recording amplifier with a novel multi-chopper technique is proposed and implemented in 180nm CMOS. The input referred rms noise is 1.54μV (1-500Hz) with 266nA tail current. The result corresponds to a 1.38 noise efficiency factor, which is the best reported among current state-of-the-art amplifiers.\",\"PeriodicalId\":381216,\"journal\":{\"name\":\"2014 Symposium on VLSI Circuits Digest of Technical Papers\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"41\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 Symposium on VLSI Circuits Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2014.6858431\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Circuits Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2014.6858431","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 266nW multi-chopper amplifier with 1.38 noise efficiency factor for neural signal recording
A low power high efficiency neural signal recording amplifier with a novel multi-chopper technique is proposed and implemented in 180nm CMOS. The input referred rms noise is 1.54μV (1-500Hz) with 266nA tail current. The result corresponds to a 1.38 noise efficiency factor, which is the best reported among current state-of-the-art amplifiers.