{"title":"深度神经网络实现的嵌入式解决方案","authors":"Adrian-Aliosa Erofei, C. Druta, C. Căleanu","doi":"10.1109/SACI.2018.8440953","DOIUrl":null,"url":null,"abstract":"Deep Neural Networks and its associate learning paradigm-Deep Learning-represents today a breakthrough in the field of Artificial Intelligence due to the impressive results obtained in many application areas, especially in image, video or speech processing. The main hindrance to the development process of such applications is represented by the vast amount of computational power needed to train such structures. Various hardware solutions arose to this problem, most of them relying on the intrinsic parallelism found in modern Graphical Processing Units. On the other hand, once the learning process was finished, the functional phase (inference) of the neural network require substantially less hardware resources enabling thus potential realtime solutions. Our work provides an extensive overview regarding currently available embedded solutions for Deep Neural Networks implementation, pointing out the main characteristics, advantages and disadvantages. We also demonstrate through experimental results that the effect of combined hardware optimization and suitable deep architecture could substantially decrease the inference process execution time.","PeriodicalId":126087,"journal":{"name":"2018 IEEE 12th International Symposium on Applied Computational Intelligence and Informatics (SACI)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Embedded Solutions for Deep Neural Networks Implementation\",\"authors\":\"Adrian-Aliosa Erofei, C. Druta, C. Căleanu\",\"doi\":\"10.1109/SACI.2018.8440953\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Deep Neural Networks and its associate learning paradigm-Deep Learning-represents today a breakthrough in the field of Artificial Intelligence due to the impressive results obtained in many application areas, especially in image, video or speech processing. The main hindrance to the development process of such applications is represented by the vast amount of computational power needed to train such structures. Various hardware solutions arose to this problem, most of them relying on the intrinsic parallelism found in modern Graphical Processing Units. On the other hand, once the learning process was finished, the functional phase (inference) of the neural network require substantially less hardware resources enabling thus potential realtime solutions. Our work provides an extensive overview regarding currently available embedded solutions for Deep Neural Networks implementation, pointing out the main characteristics, advantages and disadvantages. We also demonstrate through experimental results that the effect of combined hardware optimization and suitable deep architecture could substantially decrease the inference process execution time.\",\"PeriodicalId\":126087,\"journal\":{\"name\":\"2018 IEEE 12th International Symposium on Applied Computational Intelligence and Informatics (SACI)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 12th International Symposium on Applied Computational Intelligence and Informatics (SACI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SACI.2018.8440953\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 12th International Symposium on Applied Computational Intelligence and Informatics (SACI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SACI.2018.8440953","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Embedded Solutions for Deep Neural Networks Implementation
Deep Neural Networks and its associate learning paradigm-Deep Learning-represents today a breakthrough in the field of Artificial Intelligence due to the impressive results obtained in many application areas, especially in image, video or speech processing. The main hindrance to the development process of such applications is represented by the vast amount of computational power needed to train such structures. Various hardware solutions arose to this problem, most of them relying on the intrinsic parallelism found in modern Graphical Processing Units. On the other hand, once the learning process was finished, the functional phase (inference) of the neural network require substantially less hardware resources enabling thus potential realtime solutions. Our work provides an extensive overview regarding currently available embedded solutions for Deep Neural Networks implementation, pointing out the main characteristics, advantages and disadvantages. We also demonstrate through experimental results that the effect of combined hardware optimization and suitable deep architecture could substantially decrease the inference process execution time.