漏电流和短路电流对功率门控域涌流分析的影响

V. Sreekumar, S. Ravichandran
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引用次数: 2

摘要

电源关闭是当今设计中降低功耗的关键技术,能够验证电路从关断状态到导通状态时的行为至关重要。由于信号转换速率慢导致的高短路电流和模块的漏电流会影响模块的总突流和导通时间。在本文中,我们提出了一项关于这些影响如何影响整体分析以及如何在通电分析期间解释它们的研究。对基于ARM 968处理器的无线局域网集成电路进行了分析。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Impact of leakage and short circuit current in rush current analysis of power gated domains
Power shut off being a key technique for power reduction in today's designs, it is critical to be able to verify circuit behavior when it is powered from an off state to an on state. The total rush current and turn-on time of the module can be impacted by the high short circuit current caused by slow signal slew rates and the leakage current of the module. In this paper, we present a study on how these effects impact the overall analysis and how they can be accounted for during a power-up analysis. The analysis has been done on ARM 968 processor based Wireless LAN IC.
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