{"title":"一种基于图着色和局部变换的不完全指定多输出函数分解方法及其在FPGA映射中的应用","authors":"W. Wan, M. Perkowski","doi":"10.1109/EURDAC.1992.246238","DOIUrl":null,"url":null,"abstract":"An approach to the decomposition of incompletely specified Boolean functions is introduced, and its application to lookup-table-based field programmable gate array (FPGA) mapping is described. Three methods are developed: fast graph coloring to perform a quasi-optimum 'don't care' assignment; variable partitioning to quickly find the 'best' partitions; and local transformation to transform a nondecomposable function into several decomposable ones. The methods perform global optimization of the input function. A short description of a FPGA mapping program (TRADE) and an evaluation of its results are provided.<<ETX>>","PeriodicalId":218056,"journal":{"name":"Proceedings EURO-DAC '92: European Design Automation Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"94","resultStr":"{\"title\":\"A new approach to the decomposition of incompletely specified multi-output functions based on graph coloring and local transformations and its application to FPGA mapping\",\"authors\":\"W. Wan, M. Perkowski\",\"doi\":\"10.1109/EURDAC.1992.246238\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An approach to the decomposition of incompletely specified Boolean functions is introduced, and its application to lookup-table-based field programmable gate array (FPGA) mapping is described. Three methods are developed: fast graph coloring to perform a quasi-optimum 'don't care' assignment; variable partitioning to quickly find the 'best' partitions; and local transformation to transform a nondecomposable function into several decomposable ones. The methods perform global optimization of the input function. A short description of a FPGA mapping program (TRADE) and an evaluation of its results are provided.<<ETX>>\",\"PeriodicalId\":218056,\"journal\":{\"name\":\"Proceedings EURO-DAC '92: European Design Automation Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"94\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings EURO-DAC '92: European Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EURDAC.1992.246238\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings EURO-DAC '92: European Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURDAC.1992.246238","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new approach to the decomposition of incompletely specified multi-output functions based on graph coloring and local transformations and its application to FPGA mapping
An approach to the decomposition of incompletely specified Boolean functions is introduced, and its application to lookup-table-based field programmable gate array (FPGA) mapping is described. Three methods are developed: fast graph coloring to perform a quasi-optimum 'don't care' assignment; variable partitioning to quickly find the 'best' partitions; and local transformation to transform a nondecomposable function into several decomposable ones. The methods perform global optimization of the input function. A short description of a FPGA mapping program (TRADE) and an evaluation of its results are provided.<>
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