{"title":"一种基于互补双极技术的新型高电流增益横向PNP晶体管","authors":"M.J. Kumar, V. Parihar","doi":"10.1109/ISDRS.2003.1272092","DOIUrl":null,"url":null,"abstract":"In order to improve driver performance of PNP transistor high current gain is required but PNP transistor exhibits low current gain due to poor hole mobility. In this paper a novel high current gain lateral PNP transistor on SOI for complementary bipolar technology is presented. The paper also presents the demonstration of a significant current gain enhancement in a PNP transistor using simple surface accumulation layer transistor that is compatible with standard BiCMOS technology.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"116 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A novel high current gain lateral PNP transistor on SOI for complementary bipolar technology\",\"authors\":\"M.J. Kumar, V. Parihar\",\"doi\":\"10.1109/ISDRS.2003.1272092\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order to improve driver performance of PNP transistor high current gain is required but PNP transistor exhibits low current gain due to poor hole mobility. In this paper a novel high current gain lateral PNP transistor on SOI for complementary bipolar technology is presented. The paper also presents the demonstration of a significant current gain enhancement in a PNP transistor using simple surface accumulation layer transistor that is compatible with standard BiCMOS technology.\",\"PeriodicalId\":369241,\"journal\":{\"name\":\"International Semiconductor Device Research Symposium, 2003\",\"volume\":\"116 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Semiconductor Device Research Symposium, 2003\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISDRS.2003.1272092\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Semiconductor Device Research Symposium, 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISDRS.2003.1272092","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel high current gain lateral PNP transistor on SOI for complementary bipolar technology
In order to improve driver performance of PNP transistor high current gain is required but PNP transistor exhibits low current gain due to poor hole mobility. In this paper a novel high current gain lateral PNP transistor on SOI for complementary bipolar technology is presented. The paper also presents the demonstration of a significant current gain enhancement in a PNP transistor using simple surface accumulation layer transistor that is compatible with standard BiCMOS technology.
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