{"title":"RISC的优势能否在实时系统中得到利用?","authors":"A. Steininger, H. Schweinzer","doi":"10.1109/EMWRT.1991.144076","DOIUrl":null,"url":null,"abstract":"Within the last few years a lot of improvements have been made for processor architectures. Average and peak performance are increasing continuously. RISC, caching, pipelining and similar features have become indispensable to many systems. In critical real time systems, however, peak and average values are of minor interest. Because strict deadlines have to be met, only those values may be considered, that can be guaranteed even under adverse conditions. Features like reduced instruction set, caching, pipelining etc. are based upon statistical considerations and do not necessarily improve worst case performance. The question arises, whether new powerful processor architectures-especially the RISC architecture-are suitable for real time systems and if so, under which conditions. Some of the most important hardware features are analyzed to find an answer to this question.<<ETX>>","PeriodicalId":215427,"journal":{"name":"Proceedings. EUROMICRO `91 Workshop on Real-Time Systems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Can the advantages of RISC be utilized in real time systems?\",\"authors\":\"A. Steininger, H. Schweinzer\",\"doi\":\"10.1109/EMWRT.1991.144076\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Within the last few years a lot of improvements have been made for processor architectures. Average and peak performance are increasing continuously. RISC, caching, pipelining and similar features have become indispensable to many systems. In critical real time systems, however, peak and average values are of minor interest. Because strict deadlines have to be met, only those values may be considered, that can be guaranteed even under adverse conditions. Features like reduced instruction set, caching, pipelining etc. are based upon statistical considerations and do not necessarily improve worst case performance. The question arises, whether new powerful processor architectures-especially the RISC architecture-are suitable for real time systems and if so, under which conditions. Some of the most important hardware features are analyzed to find an answer to this question.<<ETX>>\",\"PeriodicalId\":215427,\"journal\":{\"name\":\"Proceedings. EUROMICRO `91 Workshop on Real-Time Systems\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. EUROMICRO `91 Workshop on Real-Time Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMWRT.1991.144076\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. EUROMICRO `91 Workshop on Real-Time Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMWRT.1991.144076","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Can the advantages of RISC be utilized in real time systems?
Within the last few years a lot of improvements have been made for processor architectures. Average and peak performance are increasing continuously. RISC, caching, pipelining and similar features have become indispensable to many systems. In critical real time systems, however, peak and average values are of minor interest. Because strict deadlines have to be met, only those values may be considered, that can be guaranteed even under adverse conditions. Features like reduced instruction set, caching, pipelining etc. are based upon statistical considerations and do not necessarily improve worst case performance. The question arises, whether new powerful processor architectures-especially the RISC architecture-are suitable for real time systems and if so, under which conditions. Some of the most important hardware features are analyzed to find an answer to this question.<>