A performance counter-based control flow checking technique for multi-core processors

Today, both the rapid improvement of process technology and the arrival of new embedded systems with highperformance requirements, have led to making the current trend in processors manufacturing shift from single-core processors to multi-core processors. This trend has raised several challenges for reliability in safety-critical systems that operate in high-risk environments, making them more vulnerable to soft errors. Hence, using additional methods to satisfy the strict system requirements in terms of safety and reliability is unavoidable. In this paper, an efficient hybrid method to detect control flow errors in multi-core processors has been proposed and evaluated. About 36,000 software faults have been injected into three well-known multi-threaded benchmarks at run-time. The experiment results show that the fault coverage is 100%. The results also show that the execution time overhead varies between 31.25% and 51.02%, and the program size overhead varies between 20.23% and 67.64% with respect to the employed benchmark.