大规模集成的系统架构

H. Beelitz, S. Levy, R. Linhardt, H. Miller
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引用次数: 18

摘要

半导体工业在一块硅芯片上制造和连接100个或更多逻辑门的能力正在不断发展,这将对当今计算机的性能和可靠性产生重大影响。在短短十年里,计算机制造技术已经从占据许多立方英寸体积的单个真空管栅极发展到第二代分立晶体管电路,再到第三代机器中的集成电路平面封装。每一代都通过更快的电路和更高的封装密度提供了更强的计算能力。即使在密集封装的第三代计算机中,大约99%的体积代表封装和电路互连材料,而计算机组件之间的这种分离仍然代表着严重的速度瓶颈。75%的机器延迟发生在互连布线中,而平板封装中固有的延迟仅为25%,这并不罕见。在单个硅芯片上大规模集成逻辑门,有望在更大更快的第四代机器中打破这一速度瓶颈。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
System architecture for large-scale integration
The developing capability of the semiconductor industry to fabricate and interconnect a hundred or more logic gates on a single silicon chip promises to have a substantial impact upon the performance and reliability of today's computers. In just a decade, computer fabrication techniques have progressed from a single vacuum tube gate occupying many cubic inches in volume, to second generation discrete transistor circuitry, and to integrated circuit flat-packs in the third generation machines. Each successive generation has offered more computing power through faster circuitry and increased packing densities. Approximately 99% of the volume, even in densely packaged third generation computers, represents packaging and circuit interconnection material, and this separation between computer components still represents a severe speed bottleneck. It is not uncommon for 75% of the machine delay to occur in interconnection wiring with only 25% of the delay inherent in the flat-packs. Large-scale integration of logic gates on a single silicon chip offers promise of breaking this speed bottleneck in the larger and faster fourth generation machines.
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