Mohammed Amer Karout, O. Alatise, Heaklig Ayala, C. Fisher, P. Mawby, Mohamed Taha
{"title":"WBG器件双脉冲试验台的设计过程","authors":"Mohammed Amer Karout, O. Alatise, Heaklig Ayala, C. Fisher, P. Mawby, Mohamed Taha","doi":"10.1109/CPERE56564.2023.10119544","DOIUrl":null,"url":null,"abstract":"In this paper, the design and extensive analysis of an advanced test rig for double pulse tests (DPT) is presented. Unlike the simplistic analysis that is usually done whilst designing a DPT circuit, in this work, the analysis critically considers the effects of parasitics in the capacitor, inductor, PCB fixtures, and the device under test (DUT), to attain the highest measurements accuracy. The model for the proposed system is simulated using a SPICE simulation tool, which considers all the parasitics and demonstrates the feasibility of optimizing the design parameters. Then, the physical test rig is implemented following the proposed approach to reduce the parasitic inductance between the DC-link capacitors and the fixture. The rig is designed to be flexible, where different fixtures with low parasitics can be used to connect discrete and module DUTs. The measurement circuitry is carefully optimised, to provide the ability of capturing the high dI/dt and dV/dt of wide bandgap (WBG) devices. The system can also provide temperature control via a heater and a temperature controller, so the variation of switching losses with junction temperature can be assessed. The results validate the feasibility of the design, where low ringing and low voltage overshoot in the waveforms have been obtained, easing the switching losses calculations, even with low gate resistors. Finally, a 1. 2kV/90 A rated silicon carbide device has been tested, and its switching energy has been evaluated at different junction temperatures to demonstrate the capabilities of the system.","PeriodicalId":169048,"journal":{"name":"2023 IEEE Conference on Power Electronics and Renewable Energy (CPERE)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"On the Design Procedure of the Double Pulse Test Rig for WBG devices\",\"authors\":\"Mohammed Amer Karout, O. Alatise, Heaklig Ayala, C. Fisher, P. Mawby, Mohamed Taha\",\"doi\":\"10.1109/CPERE56564.2023.10119544\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the design and extensive analysis of an advanced test rig for double pulse tests (DPT) is presented. Unlike the simplistic analysis that is usually done whilst designing a DPT circuit, in this work, the analysis critically considers the effects of parasitics in the capacitor, inductor, PCB fixtures, and the device under test (DUT), to attain the highest measurements accuracy. The model for the proposed system is simulated using a SPICE simulation tool, which considers all the parasitics and demonstrates the feasibility of optimizing the design parameters. Then, the physical test rig is implemented following the proposed approach to reduce the parasitic inductance between the DC-link capacitors and the fixture. The rig is designed to be flexible, where different fixtures with low parasitics can be used to connect discrete and module DUTs. The measurement circuitry is carefully optimised, to provide the ability of capturing the high dI/dt and dV/dt of wide bandgap (WBG) devices. The system can also provide temperature control via a heater and a temperature controller, so the variation of switching losses with junction temperature can be assessed. The results validate the feasibility of the design, where low ringing and low voltage overshoot in the waveforms have been obtained, easing the switching losses calculations, even with low gate resistors. Finally, a 1. 2kV/90 A rated silicon carbide device has been tested, and its switching energy has been evaluated at different junction temperatures to demonstrate the capabilities of the system.\",\"PeriodicalId\":169048,\"journal\":{\"name\":\"2023 IEEE Conference on Power Electronics and Renewable Energy (CPERE)\",\"volume\":\"78 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-02-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Conference on Power Electronics and Renewable Energy (CPERE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CPERE56564.2023.10119544\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Conference on Power Electronics and Renewable Energy (CPERE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CPERE56564.2023.10119544","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
On the Design Procedure of the Double Pulse Test Rig for WBG devices
In this paper, the design and extensive analysis of an advanced test rig for double pulse tests (DPT) is presented. Unlike the simplistic analysis that is usually done whilst designing a DPT circuit, in this work, the analysis critically considers the effects of parasitics in the capacitor, inductor, PCB fixtures, and the device under test (DUT), to attain the highest measurements accuracy. The model for the proposed system is simulated using a SPICE simulation tool, which considers all the parasitics and demonstrates the feasibility of optimizing the design parameters. Then, the physical test rig is implemented following the proposed approach to reduce the parasitic inductance between the DC-link capacitors and the fixture. The rig is designed to be flexible, where different fixtures with low parasitics can be used to connect discrete and module DUTs. The measurement circuitry is carefully optimised, to provide the ability of capturing the high dI/dt and dV/dt of wide bandgap (WBG) devices. The system can also provide temperature control via a heater and a temperature controller, so the variation of switching losses with junction temperature can be assessed. The results validate the feasibility of the design, where low ringing and low voltage overshoot in the waveforms have been obtained, easing the switching losses calculations, even with low gate resistors. Finally, a 1. 2kV/90 A rated silicon carbide device has been tested, and its switching energy has been evaluated at different junction temperatures to demonstrate the capabilities of the system.