增加SIMD内核的内存丢失容忍度

Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis Pub Date : 2009-11-14 DOI:10.1145/1654059.1654082

D. Tarjan, Jiayuan Meng, K. Skadron

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引用次数: 60

摘要

具有宽SIMD内核的多核处理器正在成为下一代面向吞吐量的体系结构的流行选择。我们介绍了一种称为“偏离”的硬件技术，它允许SIMD内核更好地容忍具有非连续内存访问模式的工作负载的内存延迟。允许SIMD“warp”中的单个线程滑到同一warp中的其他线程后面，即使有一部分线程正在等待内存，也允许warp继续执行。偏离可以提高一个给定设计的性能高达3.14倍，每芯单次经纱，或减少每芯所需的经纱数量，以维持给定的性能水平，从16次到2次，减少每芯面积35%。

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Increasing memory miss tolerance for SIMD cores

Manycore processors with wide SIMD cores are becoming a popular choice for the next generation of throughput oriented architectures. We introduce a hardware technique called "diverge on miss" that allows SIMD cores to better tolerate memory latency for workloads with non-contiguous memory access patterns. Individual threads within a SIMD "warp" are allowed to slip behind other threads in the same warp, letting the warp continue execution even if a subset of threads are waiting on memory. Diverge on miss can either increase the performance of a given design by up to a factor of 3.14 for a single warp per core, or reduce the number of warps per core needed to sustain a given level of performance from 16 to 2 warps, reducing the area per core by 35%.

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Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis

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