{"title":"支持IEEE1588的以太网交换机的实际实现","authors":"Daniel K6hler","doi":"10.1109/ISPCS.2007.4383787","DOIUrl":null,"url":null,"abstract":"To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":"{\"title\":\"A Practical Implementation of an IEEE1588 supporting Ethernet Switch\",\"authors\":\"Daniel K6hler\",\"doi\":\"10.1109/ISPCS.2007.4383787\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.\",\"PeriodicalId\":258197,\"journal\":{\"name\":\"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"26\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPCS.2007.4383787\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPCS.2007.4383787","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Practical Implementation of an IEEE1588 supporting Ethernet Switch
To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.