软件实现的硬件错误检测:成本与收益

Ute Schiffel, A. Schmitt, Martin Süßkraut, C. Fetzer
{"title":"软件实现的硬件错误检测:成本与收益","authors":"Ute Schiffel, A. Schmitt, Martin Süßkraut, C. Fetzer","doi":"10.1109/DEPEND.2010.16","DOIUrl":null,"url":null,"abstract":"Commercial off-the-shelf (COTS) hardware is becoming less and less reliable because of the continuously decreasing feature sizes of integrated circuits. But due to economic constraints, more and more critical systems will be based on basically unreliable COTS hardware. Usually in such systems redundant execution is used to detect erroneous executions. However, arithmetic codes promise much higher error detection rates. Yet, they are generally assumed to generate very large slowdowns. In this paper, we assess and compare the runtime overhead and error detection capabilities of redundancy and several arithmetic codes. Our results demonstrate a clear trade-off between runtime costs and gained safety. However, unexpectedly the runtime costs for arithmetic codes compared to redundancy increase only linearly, while the gained safety increases exponentially.","PeriodicalId":447746,"journal":{"name":"2010 Third International Conference on Dependability","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":"{\"title\":\"Software-Implemented Hardware Error Detection: Costs and Gains\",\"authors\":\"Ute Schiffel, A. Schmitt, Martin Süßkraut, C. Fetzer\",\"doi\":\"10.1109/DEPEND.2010.16\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Commercial off-the-shelf (COTS) hardware is becoming less and less reliable because of the continuously decreasing feature sizes of integrated circuits. But due to economic constraints, more and more critical systems will be based on basically unreliable COTS hardware. Usually in such systems redundant execution is used to detect erroneous executions. However, arithmetic codes promise much higher error detection rates. Yet, they are generally assumed to generate very large slowdowns. In this paper, we assess and compare the runtime overhead and error detection capabilities of redundancy and several arithmetic codes. Our results demonstrate a clear trade-off between runtime costs and gained safety. However, unexpectedly the runtime costs for arithmetic codes compared to redundancy increase only linearly, while the gained safety increases exponentially.\",\"PeriodicalId\":447746,\"journal\":{\"name\":\"2010 Third International Conference on Dependability\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"27\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 Third International Conference on Dependability\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DEPEND.2010.16\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Third International Conference on Dependability","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DEPEND.2010.16","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 27

摘要

由于集成电路的特征尺寸不断减小,商用现货(COTS)硬件变得越来越不可靠。但由于经济的限制,越来越多的关键系统将基于基本不可靠的COTS硬件。在这种系统中,通常使用冗余执行来检测错误执行。然而,算术编码承诺更高的错误检测率。然而,它们通常被认为会产生非常大的减速。在本文中,我们评估和比较了冗余和几种算术码的运行时开销和错误检测能力。我们的结果表明运行时成本和获得的安全性之间存在明显的权衡。然而,出乎意料的是,与冗余相比,算术代码的运行时成本仅呈线性增长,而获得的安全性则呈指数增长。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Software-Implemented Hardware Error Detection: Costs and Gains
Commercial off-the-shelf (COTS) hardware is becoming less and less reliable because of the continuously decreasing feature sizes of integrated circuits. But due to economic constraints, more and more critical systems will be based on basically unreliable COTS hardware. Usually in such systems redundant execution is used to detect erroneous executions. However, arithmetic codes promise much higher error detection rates. Yet, they are generally assumed to generate very large slowdowns. In this paper, we assess and compare the runtime overhead and error detection capabilities of redundancy and several arithmetic codes. Our results demonstrate a clear trade-off between runtime costs and gained safety. However, unexpectedly the runtime costs for arithmetic codes compared to redundancy increase only linearly, while the gained safety increases exponentially.
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