W. Liu, J.Y. Chen, W.C. Wang, S. Feng, K. Yu, J. Yan
{"title":"InGaP/GaAs异质结双极晶体管发射基结结构设计考虑","authors":"W. Liu, J.Y. Chen, W.C. Wang, S. Feng, K. Yu, J. Yan","doi":"10.1109/COMMAD.1998.791632","DOIUrl":null,"url":null,"abstract":"An InGaP/GaAs heterojunction bipolar transistor (HBT) with an 50 /spl Aring/ undoped spacer and /spl delta/-doping sheet at base-emitter heterointerface is fabricated and studied. A common-emitter current gain of 280 and an offset voltage as small as 55 mV are obtained, respectively. This results show that high current gain and low offset voltage can be attained simultaneously without the passivation of emitter-base junction. From the experimental results, it shows that the potential spike is indeed reduced by the employment of an /spl delta/-doped layer and spacer simultaneously. On the other hand, theoretical consideration also shows that the potential spike is removed by inserting a /spl delta/-doping sheet between the emitter-base heterointerface.","PeriodicalId":300064,"journal":{"name":"1998 Conference on Optoelectronic and Microelectronic Materials and Devices. Proceedings (Cat. No.98EX140)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design consideration of emitter-base junction structure for InGaP/GaAs heterojunction bipolar transistor\",\"authors\":\"W. Liu, J.Y. Chen, W.C. Wang, S. Feng, K. Yu, J. Yan\",\"doi\":\"10.1109/COMMAD.1998.791632\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An InGaP/GaAs heterojunction bipolar transistor (HBT) with an 50 /spl Aring/ undoped spacer and /spl delta/-doping sheet at base-emitter heterointerface is fabricated and studied. A common-emitter current gain of 280 and an offset voltage as small as 55 mV are obtained, respectively. This results show that high current gain and low offset voltage can be attained simultaneously without the passivation of emitter-base junction. From the experimental results, it shows that the potential spike is indeed reduced by the employment of an /spl delta/-doped layer and spacer simultaneously. On the other hand, theoretical consideration also shows that the potential spike is removed by inserting a /spl delta/-doping sheet between the emitter-base heterointerface.\",\"PeriodicalId\":300064,\"journal\":{\"name\":\"1998 Conference on Optoelectronic and Microelectronic Materials and Devices. Proceedings (Cat. No.98EX140)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-12-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 Conference on Optoelectronic and Microelectronic Materials and Devices. Proceedings (Cat. No.98EX140)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/COMMAD.1998.791632\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Conference on Optoelectronic and Microelectronic Materials and Devices. Proceedings (Cat. No.98EX140)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COMMAD.1998.791632","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design consideration of emitter-base junction structure for InGaP/GaAs heterojunction bipolar transistor
An InGaP/GaAs heterojunction bipolar transistor (HBT) with an 50 /spl Aring/ undoped spacer and /spl delta/-doping sheet at base-emitter heterointerface is fabricated and studied. A common-emitter current gain of 280 and an offset voltage as small as 55 mV are obtained, respectively. This results show that high current gain and low offset voltage can be attained simultaneously without the passivation of emitter-base junction. From the experimental results, it shows that the potential spike is indeed reduced by the employment of an /spl delta/-doped layer and spacer simultaneously. On the other hand, theoretical consideration also shows that the potential spike is removed by inserting a /spl delta/-doping sheet between the emitter-base heterointerface.