The design and performance of counter-based PDSM architectures for VLC

In this paper, we develop a new structure to obtain Pulse Dual Slope Modulation (PDSM) signals for visible light communication with dimming control. The modulator architecture consists of the simple blocks, including a counter, a MUX, and a serial to parallel converter. Compared to the traditional PDSM architectures, our proposed architecture has significant advantages, including RAM bit utilization. We simulate PDSM modulator using Modelsim-Altera program. Furthermore, we use the dual sample detection algorithm to demodulate PDSM signals. We implement both modulator and demodulator architectures on the real-time FPGA board. Therefore, we design a wireless PDSM transceiver for visible light communication. We compare simulation results with experimental results. From experimental results, it is shown that the proposed structure is practicable for PDSM modulation technique.