Prashanth Kumar, N. Gupta, Rashmi Gupta, Amit Sharma
{"title":"射频用双晕双介电三材料环栅MOSFET的噪声分析","authors":"Prashanth Kumar, N. Gupta, Rashmi Gupta, Amit Sharma","doi":"10.1109/DEVIC.2019.8783796","DOIUrl":null,"url":null,"abstract":"In this paper, the noise performance of Dual Halo Dual Dielectric Triple Material Surrounding Gate (DH-DD-TM-SG) MOSFET has been investigated. The assessment of noise performance has been carried out in terms of noise figure, noise conductance and optimum impedance. These noise metrics reveal notable cutback in noise by virtue of dual dielectric and dual halo implants in DH-DD-TM-SG MOSFET in contrast to conventional Triple Material Surrounding Gate (TM-SG) MOSFET. It is scrutinized that noise figure is shrunk by 35.7% and optimum impedance is raised by 14.49% in DH-DD-TM-SG MOSFET than its counterpart, making it a suitable device for designing of low-noise amplifiers.","PeriodicalId":294095,"journal":{"name":"2019 Devices for Integrated Circuit (DevIC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Noise analysis of Dual Halo Dual Dielectric Triple Material Surrounding Gate MOSFET for RF applications\",\"authors\":\"Prashanth Kumar, N. Gupta, Rashmi Gupta, Amit Sharma\",\"doi\":\"10.1109/DEVIC.2019.8783796\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the noise performance of Dual Halo Dual Dielectric Triple Material Surrounding Gate (DH-DD-TM-SG) MOSFET has been investigated. The assessment of noise performance has been carried out in terms of noise figure, noise conductance and optimum impedance. These noise metrics reveal notable cutback in noise by virtue of dual dielectric and dual halo implants in DH-DD-TM-SG MOSFET in contrast to conventional Triple Material Surrounding Gate (TM-SG) MOSFET. It is scrutinized that noise figure is shrunk by 35.7% and optimum impedance is raised by 14.49% in DH-DD-TM-SG MOSFET than its counterpart, making it a suitable device for designing of low-noise amplifiers.\",\"PeriodicalId\":294095,\"journal\":{\"name\":\"2019 Devices for Integrated Circuit (DevIC)\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Devices for Integrated Circuit (DevIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DEVIC.2019.8783796\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Devices for Integrated Circuit (DevIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DEVIC.2019.8783796","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Noise analysis of Dual Halo Dual Dielectric Triple Material Surrounding Gate MOSFET for RF applications
In this paper, the noise performance of Dual Halo Dual Dielectric Triple Material Surrounding Gate (DH-DD-TM-SG) MOSFET has been investigated. The assessment of noise performance has been carried out in terms of noise figure, noise conductance and optimum impedance. These noise metrics reveal notable cutback in noise by virtue of dual dielectric and dual halo implants in DH-DD-TM-SG MOSFET in contrast to conventional Triple Material Surrounding Gate (TM-SG) MOSFET. It is scrutinized that noise figure is shrunk by 35.7% and optimum impedance is raised by 14.49% in DH-DD-TM-SG MOSFET than its counterpart, making it a suitable device for designing of low-noise amplifiers.