使用部分标签和窄宽度操作数的低成本值预测微架构

2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233) Pub Date : 2001-08-26 DOI:10.1109/PACRIM.2001.953587

Byun-Soo Choi, Dong-Ik Lee

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引用次数: 4

摘要

本文研究了值预测方法在高性能微处理器上的实现成本，提出了一种新的低成本值预测微体系结构。经过仿真，我们发现所提出的微架构可以将实现成本降低36%至50%，并且性能略有下降(小于5%)。

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Cost effective value prediction microarchitecture using partial-tag and narrow-width operands

In this paper we investigate the implementation cost of value prediction methods for high performance microprocessors and propose a new value prediction microarchitecture with low cost. After simulation, we found that the proposed microarchitecture can decrease the implementation cost by 36% to 50% and with slight performance degradation (less than 5%).

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2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233)

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