一种用于快速算术运算的超高速booth编码器结构

2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES) Pub Date : 2015-06-25 DOI:10.1109/MIXDES.2015.7208526

M. Ghasemzadeh, Amin Akbari, K. Hadidi

{"title":"一种用于快速算术运算的超高速booth编码器结构","authors":"M. Ghasemzadeh, Amin Akbari, K. Hadidi","doi":"10.1109/MIXDES.2015.7208526","DOIUrl":null,"url":null,"abstract":"A novel high speed booth encoder is designed by utilizing a new truth table. The important advantage of this structure is its low delay with respect to the previously presented papers. Moreover, generating partial products and putting the partial products array in order are done at the same time. Simulation results applied to the Hspice software in TSMC 0.18μm technology proves that the total delay of the proposed structure is about 170ps.","PeriodicalId":188240,"journal":{"name":"2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An ultra high speed booth encoder structure for fast arithmetic operations\",\"authors\":\"M. Ghasemzadeh, Amin Akbari, K. Hadidi\",\"doi\":\"10.1109/MIXDES.2015.7208526\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel high speed booth encoder is designed by utilizing a new truth table. The important advantage of this structure is its low delay with respect to the previously presented papers. Moreover, generating partial products and putting the partial products array in order are done at the same time. Simulation results applied to the Hspice software in TSMC 0.18μm technology proves that the total delay of the proposed structure is about 170ps.\",\"PeriodicalId\":188240,\"journal\":{\"name\":\"2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MIXDES.2015.7208526\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIXDES.2015.7208526","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

利用一种新的真值表设计了一种新型的高速展台编码器。这种结构的重要优点是它的低延迟相对于以前提出的论文。同时实现了部分积的生成和部分积数组的排序。应用于TSMC 0.18μm工艺的Hspice软件的仿真结果表明，该结构的总延迟约为170ps。

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An ultra high speed booth encoder structure for fast arithmetic operations

A novel high speed booth encoder is designed by utilizing a new truth table. The important advantage of this structure is its low delay with respect to the previously presented papers. Moreover, generating partial products and putting the partial products array in order are done at the same time. Simulation results applied to the Hspice software in TSMC 0.18μm technology proves that the total delay of the proposed structure is about 170ps.

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来源期刊

2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)

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