用于高阶除法的具有FSK信号偏差的CMOS注入锁定分频器

2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks Pub Date : 1900-01-01 DOI:10.1109/RFIT.2005.1598900

F. Huang, Y. Chan

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引用次数: 1

摘要

本文采用0.13 /spl mu/m CMOS技术，设计并实现了注入锁定分频器(ILFD)。它不仅可以通过控制电压在300 MHz ~ 4.7 GHz范围内调节自激振荡频率，而且在自激振荡频率固定为2.5 GHz时，具有分频比为2、4和6的宽锁定范围的分频性能。在高阶分频比下，ILFD的瞬态响应，即FSK信号在频率降频操作中的偏差已经得到了证明。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A CMOS injection-locked frequency divider with FSK signal deviations for high-order division

In this report, an injection-locked frequency divider (ILFD) was designed and realized using the 0.13 /spl mu/m CMOS technologies. It not only demonstrates a variable self-oscillation frequency from 300 MHz to 4.7 GHz adjusted by the controlled voltages, but also exhibits the divider performance with a wide locking range for division ratios of 2, 4 and 6 as the self-oscillation frequency fixed to 2.5 GHz. The transient responses in ILFD, the FSK signal deviations through the frequency down-conversion operation have been demonstrated for the high-order division ratios.

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2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks

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