用于HDTV中DCT的最佳双模转置寄存器阵列设计

IEEE 1992 International Conference on Consumer Electronics Digest of Technical Papers Pub Date : 1992-06-02 DOI:10.1109/ICCE.1992.697232

K. Dejhan, F. Cheevasuvit, T. Trisuwannawat, M. Kaneko

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引用次数: 0

摘要

通过对静态寄存器的优化，开发了一种用于数据格式设计的最优双模矩阵转置器。该架构采用1.2~ HCMOS3技术设计，以实现最佳的速度/面积/功耗权衡。

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An Optimal Dual-mode Transposition Register Array Design For DCT In HDTV Applications

An optimal dual-mode matrix transposer using register for the design of data format has been developed with optimization of static register. The architecture has been designed with 1.2~ HCMOS3 technology for the best speed/area/power trade-off.

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来源期刊

IEEE 1992 International Conference on Consumer Electronics Digest of Technical Papers

CiteScore

1.90

自引率

0.00%

发文量