{"title":"2.5-GS/s 30mw 4位Flash ADC，采用90nm CMOS","authors":"T. Sundstrom, A. Alvandpour","doi":"10.1109/NORCHP.2008.4738324","DOIUrl":null,"url":null,"abstract":"A 2.5 GS/s flash ADC, fabricated in 90 nm CMOS, avoids traditional power, speed and accuracy trade-offs by using comparator redundancy with power-gating capabilities. Redundancy removes the need to control comparator offsets, allowing the large process-variation induced mismatch of small devices in nanometer technologies. This enables the use of small-sized, ultra-low-power comparators. Measurement results show that the ADC dissipates 30 mW at 1.2 V. With 63 gate-able comparators, the ADC achieves 4.0 effective number of bits.","PeriodicalId":199376,"journal":{"name":"2008 NORCHIP","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":"{\"title\":\"A 2.5-GS/s 30-mW 4-bit Flash ADC in 90nm CMOS\",\"authors\":\"T. Sundstrom, A. Alvandpour\",\"doi\":\"10.1109/NORCHP.2008.4738324\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 2.5 GS/s flash ADC, fabricated in 90 nm CMOS, avoids traditional power, speed and accuracy trade-offs by using comparator redundancy with power-gating capabilities. Redundancy removes the need to control comparator offsets, allowing the large process-variation induced mismatch of small devices in nanometer technologies. This enables the use of small-sized, ultra-low-power comparators. Measurement results show that the ADC dissipates 30 mW at 1.2 V. With 63 gate-able comparators, the ADC achieves 4.0 effective number of bits.\",\"PeriodicalId\":199376,\"journal\":{\"name\":\"2008 NORCHIP\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"25\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 NORCHIP\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORCHP.2008.4738324\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 NORCHIP","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHP.2008.4738324","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 2.5 GS/s flash ADC, fabricated in 90 nm CMOS, avoids traditional power, speed and accuracy trade-offs by using comparator redundancy with power-gating capabilities. Redundancy removes the need to control comparator offsets, allowing the large process-variation induced mismatch of small devices in nanometer technologies. This enables the use of small-sized, ultra-low-power comparators. Measurement results show that the ADC dissipates 30 mW at 1.2 V. With 63 gate-able comparators, the ADC achieves 4.0 effective number of bits.
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