{"title":"高帧率CCD图像传感器驱动电路设计","authors":"Yajiao Hao, Xuebin Liu","doi":"10.1109/ICACI.2012.6463324","DOIUrl":null,"url":null,"abstract":"In the light of a frame-transfer CCD area array with high frame rate, the paper explains its operation mechanism in detail. In this paper, LM317H and LM337H are chosen to design a variety of bias voltages required for the CCD. The driving pulses for CCD are generated by the FPGA of Xilinx Corporation and the driving circuit is designed by EL7457CL. The 16 output electrical signals from CCD are pre-processed by voltage followers and differential amplifiers. The experimental results show that the design of driving circuit can meet the normal demands for CCD.","PeriodicalId":404759,"journal":{"name":"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Driving circuit design for high frame rate CCD image sensor\",\"authors\":\"Yajiao Hao, Xuebin Liu\",\"doi\":\"10.1109/ICACI.2012.6463324\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the light of a frame-transfer CCD area array with high frame rate, the paper explains its operation mechanism in detail. In this paper, LM317H and LM337H are chosen to design a variety of bias voltages required for the CCD. The driving pulses for CCD are generated by the FPGA of Xilinx Corporation and the driving circuit is designed by EL7457CL. The 16 output electrical signals from CCD are pre-processed by voltage followers and differential amplifiers. The experimental results show that the design of driving circuit can meet the normal demands for CCD.\",\"PeriodicalId\":404759,\"journal\":{\"name\":\"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICACI.2012.6463324\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICACI.2012.6463324","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Driving circuit design for high frame rate CCD image sensor
In the light of a frame-transfer CCD area array with high frame rate, the paper explains its operation mechanism in detail. In this paper, LM317H and LM337H are chosen to design a variety of bias voltages required for the CCD. The driving pulses for CCD are generated by the FPGA of Xilinx Corporation and the driving circuit is designed by EL7457CL. The 16 output electrical signals from CCD are pre-processed by voltage followers and differential amplifiers. The experimental results show that the design of driving circuit can meet the normal demands for CCD.