{"title":"基于0.35 /spl mu/m BiCMOS技术的5-6 GHz无线局域网收发器多标准频率合成器","authors":"A. Boni, S. Dondi, A. Facen","doi":"10.1109/RWS.2006.1615193","DOIUrl":null,"url":null,"abstract":"The paper discusses the design of a fully integrated 0.35 /spl mu/m BiCMOS frequency synthesizer, operating in the 4-to-5 GHz band. The circuit is suitable for wireless transceivers, providing carriers for both 802.11a (Europe and US) and HiperLAN transmission standards. Novel techniques for phase noise reduction are introduced, as well as enhanced approaches to VCO characteristics determination and frequency division circuitry.","PeriodicalId":244560,"journal":{"name":"2006 IEEE Radio and Wireless Symposium","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A multistandard frequency synthesizer for 5-6 GHz WLAN transceivers in 0.35 /spl mu/m BiCMOS technology\",\"authors\":\"A. Boni, S. Dondi, A. Facen\",\"doi\":\"10.1109/RWS.2006.1615193\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper discusses the design of a fully integrated 0.35 /spl mu/m BiCMOS frequency synthesizer, operating in the 4-to-5 GHz band. The circuit is suitable for wireless transceivers, providing carriers for both 802.11a (Europe and US) and HiperLAN transmission standards. Novel techniques for phase noise reduction are introduced, as well as enhanced approaches to VCO characteristics determination and frequency division circuitry.\",\"PeriodicalId\":244560,\"journal\":{\"name\":\"2006 IEEE Radio and Wireless Symposium\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-04-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Radio and Wireless Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RWS.2006.1615193\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Radio and Wireless Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS.2006.1615193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A multistandard frequency synthesizer for 5-6 GHz WLAN transceivers in 0.35 /spl mu/m BiCMOS technology
The paper discusses the design of a fully integrated 0.35 /spl mu/m BiCMOS frequency synthesizer, operating in the 4-to-5 GHz band. The circuit is suitable for wireless transceivers, providing carriers for both 802.11a (Europe and US) and HiperLAN transmission standards. Novel techniques for phase noise reduction are introduced, as well as enhanced approaches to VCO characteristics determination and frequency division circuitry.
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