A design flow for locally-clocked XBM asynchronous state machines using synchronous CAD tools

Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the control unit design of complex digital systems. These systems can present serious problems related to the global clock. In this context, the asynchronous paradigm shows interesting features that fit as an alternative for the design, despite of the difficulties of the application of asynchronous logic. An interesting architecture for the Asynchronous Finite State Machines Asynchronous (AFSM) is based on local clock, because it reduces the requirements of asynchronous logic. This paper proposes a new architecture of local clock to AFSMs, which is described by a popular specification known as Extended Burst-Mode (XBM). This architecture has a better cycle time when compared to other local clock architectures. Also, the paper proposes a "necessary and sufficient" condition for the local clock AFSMs on the proposed architecture to be synthesized completely by the use of conventional tools. Through a case study, we present the architecture, its robustness, the synthesis procedure and compare it with other local clock architectures, highlighting its advantages.