{"title":"基于增量调制的可合成vco型adc的线性化","authors":"Vishnu Unnikrishnan, M. Vesterbacka","doi":"10.1109/ECCTD.2015.7300003","DOIUrl":null,"url":null,"abstract":"VCO-based ADC is an attractive candidate for the synthesis of all-digital ADCs using standard cells. However, the non-linearity of a synthesizable VCO requires digital postprocessing to obtain good performance. We propose another solution where the input analog signal is pre-coded into a delta-modulated pulse stream which is used to drive a VCO-based converter. This causes the oscillator to operate at two distinct frequencies thereby eliminating the VCO non-linearity from the converter transfer function. A circuit is proposed that consists of a synthesized digital block realizing all the active parts of the circuit and a passive RC net used as an integrator. Spectre simulation of the netlist synthesized using a 65 nm standard cell library shows a performance of 8.2 bit ENOB over a 3 MHz bandwidth without using any digital post-processing.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Linearization of synthesizable VCO-based ADCs using delta modulation\",\"authors\":\"Vishnu Unnikrishnan, M. Vesterbacka\",\"doi\":\"10.1109/ECCTD.2015.7300003\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"VCO-based ADC is an attractive candidate for the synthesis of all-digital ADCs using standard cells. However, the non-linearity of a synthesizable VCO requires digital postprocessing to obtain good performance. We propose another solution where the input analog signal is pre-coded into a delta-modulated pulse stream which is used to drive a VCO-based converter. This causes the oscillator to operate at two distinct frequencies thereby eliminating the VCO non-linearity from the converter transfer function. A circuit is proposed that consists of a synthesized digital block realizing all the active parts of the circuit and a passive RC net used as an integrator. Spectre simulation of the netlist synthesized using a 65 nm standard cell library shows a performance of 8.2 bit ENOB over a 3 MHz bandwidth without using any digital post-processing.\",\"PeriodicalId\":148014,\"journal\":{\"name\":\"2015 European Conference on Circuit Theory and Design (ECCTD)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 European Conference on Circuit Theory and Design (ECCTD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCTD.2015.7300003\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2015.7300003","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Linearization of synthesizable VCO-based ADCs using delta modulation
VCO-based ADC is an attractive candidate for the synthesis of all-digital ADCs using standard cells. However, the non-linearity of a synthesizable VCO requires digital postprocessing to obtain good performance. We propose another solution where the input analog signal is pre-coded into a delta-modulated pulse stream which is used to drive a VCO-based converter. This causes the oscillator to operate at two distinct frequencies thereby eliminating the VCO non-linearity from the converter transfer function. A circuit is proposed that consists of a synthesized digital block realizing all the active parts of the circuit and a passive RC net used as an integrator. Spectre simulation of the netlist synthesized using a 65 nm standard cell library shows a performance of 8.2 bit ENOB over a 3 MHz bandwidth without using any digital post-processing.