异步顺序电路的存储器和可编程逻辑阵列的使用

A. Ditzinger, H. Lipp
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引用次数: 9

摘要

异步顺序电路的设计通常涉及到观察一些特定的时序约束以避免不可靠行为的问题。状态转移方程的组合电路的状态分配和无危险构造是研究的重要课题。它们对设计的贡献很大,特别是与同步操作系统相比。另一方面,数字电路解决控制任务的应用意味着控制器和被控单元之间越来越多的异步交互,以及现代、高度集成的模块的使用。本文研究了应用任意选择但唯一的状态分配代码的可能性,使用l.s.i.存储器和可编程逻辑阵列来实现比离散或s.s.i. /m.s.i.更复杂的异步顺序电路。组件。导出了一个基本模型来描述这种矩阵阵列的时间特性,并建立了设计规则,以便通过一些简单的测量来确定给定的模块是否可以在该应用中使用。对可用存储器和现场可编程逻辑阵列的广泛调查结果表明,可靠的异步顺序电路可以在没有危险问题和需要特殊状态分配程序的情况下实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Use of memories and programmable logic arrays for asynchronous sequential circuits
The design of asynchronous sequential circuits is commonly related to the problem of observing some specific timing constraints to avoid unreliable behaviour. State assignment and hazard-free construction of the combinational circuits for the state transition equations are the most essential topics to investigate. They contribute significantly to the design, particularly in comparison with that of synchronously operated systems. On the other hand, the application of digital circuitry for solving control tasks implies more and more asynchronous interaction between the controller and the controlled unit, and also the use of modern, highly-integrated modules. This paper investigates the possibility of applying arbitrarily chosen, but unique, codes for state assignments, using l.s.i. memories and programmable logic arrays for implementing more complex asynchronous sequential circuits than is possible with discrete or s.s.i/m.s.i. components. A basic model is derived to describe the time properties of such matrix arrays, and design rules are established to decide easily by some simple measurements, if a given module may be used in that application. The results of a broad investigation into available memories and field-programmable logic arrays show that reliable asynchronous sequential circuits may be implemented without having hazard problems and the need for special state-assignment procedures.
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