{"title":"一种用于SMPS PWM控制器的低待机功率启动电路","authors":"In-Seok Jung, Yong-Bin Kim","doi":"10.1145/2206781.2206841","DOIUrl":null,"url":null,"abstract":"In this paper, a novel start-up circuit with a simple topology and low stand-by power during under voltage lockout (UVLO) mode is proposed for SMPS (switching mode power supplies) application. The proposed start-up circuit is designed using only a few MOSFETs, LDMOSs, and one JFET based on the analysis of the existing start-up circuits to address the power consumption and input voltage range issues of the conventional start-up. Simulated results using 0.35um BCDMOS process demonstrate that the leakage current of the proposed circuit is less than 1uA after UVLO signal turns on. Setting time is less than 1ms when the load current changes from 10mA to 20mA and vice versa","PeriodicalId":272619,"journal":{"name":"ACM Great Lakes Symposium on VLSI","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A low stand-by power start-up circuit for SMPS PWM controller\",\"authors\":\"In-Seok Jung, Yong-Bin Kim\",\"doi\":\"10.1145/2206781.2206841\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a novel start-up circuit with a simple topology and low stand-by power during under voltage lockout (UVLO) mode is proposed for SMPS (switching mode power supplies) application. The proposed start-up circuit is designed using only a few MOSFETs, LDMOSs, and one JFET based on the analysis of the existing start-up circuits to address the power consumption and input voltage range issues of the conventional start-up. Simulated results using 0.35um BCDMOS process demonstrate that the leakage current of the proposed circuit is less than 1uA after UVLO signal turns on. Setting time is less than 1ms when the load current changes from 10mA to 20mA and vice versa\",\"PeriodicalId\":272619,\"journal\":{\"name\":\"ACM Great Lakes Symposium on VLSI\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-05-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ACM Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2206781.2206841\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACM Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2206781.2206841","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low stand-by power start-up circuit for SMPS PWM controller
In this paper, a novel start-up circuit with a simple topology and low stand-by power during under voltage lockout (UVLO) mode is proposed for SMPS (switching mode power supplies) application. The proposed start-up circuit is designed using only a few MOSFETs, LDMOSs, and one JFET based on the analysis of the existing start-up circuits to address the power consumption and input voltage range issues of the conventional start-up. Simulated results using 0.35um BCDMOS process demonstrate that the leakage current of the proposed circuit is less than 1uA after UVLO signal turns on. Setting time is less than 1ms when the load current changes from 10mA to 20mA and vice versa