量子电路学习的可表达性与过拟合

Chih-Chieh Chen, Masaya Watabe, Kodai Shiba, Masaru Sogabe, K. Sakamoto, T. Sogabe
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引用次数: 23

摘要

利用量子处理器对高维函数逼近器进行建模是量子机器学习的一种典型方法,具有潜在的优势。推测量子电路的统一性为避免过拟合提供了可能的正则化。然而,在现有噪声-中尺度量子器件的限制下,正则化如何与可表达性相互作用尚不清楚。在本文中,我们对量子电路学习问题进行了仿真和理论分析。深入的数值模拟表明,随着电路深度的增加,该算法的可表达性和泛化误差尺度趋于饱和,这意味着量子电路学习场景中的自动正则化可以避免过拟合问题。这一观察结果得到了PAC可学习性理论的支持,该理论证明了由于硬件效率分析的局部性和统一性,VC维是上界的。我们的研究为通过统一自动正则化来抑制过拟合提供了支持证据,并为在硬件约束下可能的性能改进提供了指导。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
On the Expressibility and Overfitting of Quantum Circuit Learning
Applying quantum processors to model a high-dimensional function approximator is a typical method in quantum machine learning with potential advantage. It is conjectured that the unitarity of quantum circuits provides possible regularization to avoid overfitting. However, it is not clear how the regularization interplays with the expressibility under the limitation of current Noisy-Intermediate Scale Quantum devices. In this article, we perform simulations and theoretical analysis of the quantum circuit learning problem with hardware-efficient ansatz. Thorough numerical simulations show that the expressibility and generalization error scaling of the ansatz saturate when the circuit depth increases, implying the automatic regularization to avoid the overfitting issue in the quantum circuit learning scenario. This observation is supported by the theory on PAC learnability, which proves that VC dimension is upper bounded due to the locality and unitarity of the hardware-efficient ansatz. Our study provides supporting evidence for automatic regularization by unitarity to suppress overfitting and guidelines for possible performance improvement under hardware constraints.
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