F. Corno, G. Cumani, M. Sonza Reorda, Giovanni Squillero
{"title":"高效的机器码测试程序归纳","authors":"F. Corno, G. Cumani, M. Sonza Reorda, Giovanni Squillero","doi":"10.1109/CEC.2002.1004462","DOIUrl":null,"url":null,"abstract":"Technology advances allow integrating an entire system on a single chip, including memories and peripherals. The testing of these devices is becoming a major issue for chip manufacturing industries. This paper presents a methodology, similar to genetic programming, for inducing test programs. However, it includes the ability to explicitly specify registers and resorts to directed acyclic graphs instead of trees. Moreover, it exploits a database containing the assembly-level semantics associated with each graph node. This approach is extremely efficient and versatile: candidate solutions are translated into source-code programs allowing millions of evaluations per second. The proposed approach is extremely versatile: the macro library allows the target processor and the environment to be changed easily. The approach was verified on three processors with different instruction sets, different formalisms and different conventions. A complete set of experiments on a test function is also reported for the SPARC processor.","PeriodicalId":184547,"journal":{"name":"Proceedings of the 2002 Congress on Evolutionary Computation. CEC'02 (Cat. No.02TH8600)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":"{\"title\":\"Efficient machine-code test-program induction\",\"authors\":\"F. Corno, G. Cumani, M. Sonza Reorda, Giovanni Squillero\",\"doi\":\"10.1109/CEC.2002.1004462\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Technology advances allow integrating an entire system on a single chip, including memories and peripherals. The testing of these devices is becoming a major issue for chip manufacturing industries. This paper presents a methodology, similar to genetic programming, for inducing test programs. However, it includes the ability to explicitly specify registers and resorts to directed acyclic graphs instead of trees. Moreover, it exploits a database containing the assembly-level semantics associated with each graph node. This approach is extremely efficient and versatile: candidate solutions are translated into source-code programs allowing millions of evaluations per second. The proposed approach is extremely versatile: the macro library allows the target processor and the environment to be changed easily. The approach was verified on three processors with different instruction sets, different formalisms and different conventions. A complete set of experiments on a test function is also reported for the SPARC processor.\",\"PeriodicalId\":184547,\"journal\":{\"name\":\"Proceedings of the 2002 Congress on Evolutionary Computation. CEC'02 (Cat. No.02TH8600)\",\"volume\":\"110 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-05-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"22\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2002 Congress on Evolutionary Computation. CEC'02 (Cat. No.02TH8600)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CEC.2002.1004462\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2002 Congress on Evolutionary Computation. CEC'02 (Cat. No.02TH8600)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CEC.2002.1004462","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Technology advances allow integrating an entire system on a single chip, including memories and peripherals. The testing of these devices is becoming a major issue for chip manufacturing industries. This paper presents a methodology, similar to genetic programming, for inducing test programs. However, it includes the ability to explicitly specify registers and resorts to directed acyclic graphs instead of trees. Moreover, it exploits a database containing the assembly-level semantics associated with each graph node. This approach is extremely efficient and versatile: candidate solutions are translated into source-code programs allowing millions of evaluations per second. The proposed approach is extremely versatile: the macro library allows the target processor and the environment to be changed easily. The approach was verified on three processors with different instruction sets, different formalisms and different conventions. A complete set of experiments on a test function is also reported for the SPARC processor.