{"title":"用于多通道超声成像系统的LVDS RX软IP内核设计","authors":"Song-Nien Tang, Chien-Ju Lee, Yen-Chung Huang, Guo-Zua Wu","doi":"10.1109/ISNE.2016.7543380","DOIUrl":null,"url":null,"abstract":"In this paper, a soft IP kernel of LVDS (low-voltage differential signaling) receivers is proposed for multichannel ultrasound imaging applications. By means of careful cell-based design, a high-speed de-serializer is developed with control-able bit-shift and delay-adjustment operations. Furthermore, using the proposed hybrid coarse-tune and two-level fine-tune schemes, a synchronization controller can perform efficient and robust multichannel LVDS signal synchronizing processes in cooperation with the de-serializer. The proposed LVDS IP kernel is synthesizable cell-based design, which is soft/portable to different circuit technology and system applications. Based on the proposed LVDS structure, four sets of 8-channel LVDS receivers were designed and implemented on a 32-channel FPGA-based ultrasound imaging platform. Integrated with the ultrasound AFE/HVFE (analog and high-voltage front-end) module, a throughput of 480 Mb/s per channel can be achieved for test patterns, 32-channel ultrasound image and color-Doppler display.","PeriodicalId":127324,"journal":{"name":"2016 5th International Symposium on Next-Generation Electronics (ISNE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of a LVDS RX soft IP kernel for multichannel ultrasound imaging systems\",\"authors\":\"Song-Nien Tang, Chien-Ju Lee, Yen-Chung Huang, Guo-Zua Wu\",\"doi\":\"10.1109/ISNE.2016.7543380\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a soft IP kernel of LVDS (low-voltage differential signaling) receivers is proposed for multichannel ultrasound imaging applications. By means of careful cell-based design, a high-speed de-serializer is developed with control-able bit-shift and delay-adjustment operations. Furthermore, using the proposed hybrid coarse-tune and two-level fine-tune schemes, a synchronization controller can perform efficient and robust multichannel LVDS signal synchronizing processes in cooperation with the de-serializer. The proposed LVDS IP kernel is synthesizable cell-based design, which is soft/portable to different circuit technology and system applications. Based on the proposed LVDS structure, four sets of 8-channel LVDS receivers were designed and implemented on a 32-channel FPGA-based ultrasound imaging platform. Integrated with the ultrasound AFE/HVFE (analog and high-voltage front-end) module, a throughput of 480 Mb/s per channel can be achieved for test patterns, 32-channel ultrasound image and color-Doppler display.\",\"PeriodicalId\":127324,\"journal\":{\"name\":\"2016 5th International Symposium on Next-Generation Electronics (ISNE)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-08-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 5th International Symposium on Next-Generation Electronics (ISNE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISNE.2016.7543380\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 5th International Symposium on Next-Generation Electronics (ISNE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2016.7543380","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a LVDS RX soft IP kernel for multichannel ultrasound imaging systems
In this paper, a soft IP kernel of LVDS (low-voltage differential signaling) receivers is proposed for multichannel ultrasound imaging applications. By means of careful cell-based design, a high-speed de-serializer is developed with control-able bit-shift and delay-adjustment operations. Furthermore, using the proposed hybrid coarse-tune and two-level fine-tune schemes, a synchronization controller can perform efficient and robust multichannel LVDS signal synchronizing processes in cooperation with the de-serializer. The proposed LVDS IP kernel is synthesizable cell-based design, which is soft/portable to different circuit technology and system applications. Based on the proposed LVDS structure, four sets of 8-channel LVDS receivers were designed and implemented on a 32-channel FPGA-based ultrasound imaging platform. Integrated with the ultrasound AFE/HVFE (analog and high-voltage front-end) module, a throughput of 480 Mb/s per channel can be achieved for test patterns, 32-channel ultrasound image and color-Doppler display.