Self-checking CMOS circuit design

This paper presents a new technique for designing single stage fully complementary metal oxide semiconductor (FCMOS) and CMOS domino logic circuits so that they are totally self checking for all single breaks. It involves the encoding of the output of the circuit in an error detecting code. CMOS circuits designed using the technique have two outputs. Two of the combinations (01, 10) are considered to be valid code-words. The circuit is augmented such that any break in the modified circuit produces a non-valid output 11, thus ensuring automatic fault detection.