{"title":"基于预测校正方法的通用Voronoi图构造的硬件高效架构","authors":"L. Vachhani, K. Sridharan","doi":"10.1109/ADCOM.2007.42","DOIUrl":null,"url":null,"abstract":"This paper presents a hardware-efficient scheme to con- struct sensor-based Generalized Voronoi Diagram (GVD) of an indoor environment. An architecture to construct the GVD using a prediction and correction strategy is pre- sented. The approach is based on processing distance infor- mation from ultrasonic sensors. A feature of the proposed approach is that it does not involve operations that are ex- pensive in hardware. Results of FPGA implementation are also presented. The design is shown to be space efficient and fits in a low-end FPGA device (with a small number of system gates). Keywords: Generalized Voronoi Diagram (GVD), Ultra- sonic sensors, Prediction and Correction Strategy, Architec- ture, Field Programmable Gate Array (FPGA), Robotics","PeriodicalId":185608,"journal":{"name":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","volume":"79 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Hardware-Efficient Architecture for Generalized Voronoi Diagram Construction Using a Prediction-Correction Approach\",\"authors\":\"L. Vachhani, K. Sridharan\",\"doi\":\"10.1109/ADCOM.2007.42\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a hardware-efficient scheme to con- struct sensor-based Generalized Voronoi Diagram (GVD) of an indoor environment. An architecture to construct the GVD using a prediction and correction strategy is pre- sented. The approach is based on processing distance infor- mation from ultrasonic sensors. A feature of the proposed approach is that it does not involve operations that are ex- pensive in hardware. Results of FPGA implementation are also presented. The design is shown to be space efficient and fits in a low-end FPGA device (with a small number of system gates). Keywords: Generalized Voronoi Diagram (GVD), Ultra- sonic sensors, Prediction and Correction Strategy, Architec- ture, Field Programmable Gate Array (FPGA), Robotics\",\"PeriodicalId\":185608,\"journal\":{\"name\":\"15th International Conference on Advanced Computing and Communications (ADCOM 2007)\",\"volume\":\"79 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"15th International Conference on Advanced Computing and Communications (ADCOM 2007)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ADCOM.2007.42\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"15th International Conference on Advanced Computing and Communications (ADCOM 2007)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ADCOM.2007.42","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware-Efficient Architecture for Generalized Voronoi Diagram Construction Using a Prediction-Correction Approach
This paper presents a hardware-efficient scheme to con- struct sensor-based Generalized Voronoi Diagram (GVD) of an indoor environment. An architecture to construct the GVD using a prediction and correction strategy is pre- sented. The approach is based on processing distance infor- mation from ultrasonic sensors. A feature of the proposed approach is that it does not involve operations that are ex- pensive in hardware. Results of FPGA implementation are also presented. The design is shown to be space efficient and fits in a low-end FPGA device (with a small number of system gates). Keywords: Generalized Voronoi Diagram (GVD), Ultra- sonic sensors, Prediction and Correction Strategy, Architec- ture, Field Programmable Gate Array (FPGA), Robotics